59 search results - page 9 / 12 » Modeling Cache Effects at the Transaction Level |
SIGMETRICS
2011
ACM
12 years 9 months ago
2011
ACM
The amount of charge stored in an SRAM cell shrinks rapidly with each technology generation thus increasingly exposing caches to soft errors. Benchmarking the FIT rate of caches d...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
USENIX
2008
13 years 9 months ago
2008
In many of today's applications, access to storage constitutes the major cost of processing a user request. Data prefetching has been used to alleviate the storage access lat...
EXPCS
2007
13 years 8 months ago
2007
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes the use of microprocessor performance counters for online measurement of complete system power consumption. While past studies have demonstrated the use of per...