356 search results - page 41 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
DATE
2004
IEEE
14 years 12 days ago
2004
IEEE
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
PODC
2006
ACM
14 years 2 months ago
2006
ACM
We present Grouped Distributed Queues (GDQ), the first proportional share scheduler for multiprocessor systems that scales well with a large number of processors and processes. G...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
CF
2010
ACM
14 years 1 months ago
2010
ACM
Supercomputers need a huge budget to be built and maintained. To maximize the usage of their resources, application developers spend time to optimize the code of the parallel appl...
DAGSTUHL
2007
13 years 10 months ago
2007
The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a...