356 search results - page 52 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
WSC
1997
13 years 10 months ago
1997
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
SC
1991
ACM
14 years 6 days ago
1991
ACM
In cache based multiprocessors a protocol must maintain coherence among replicated copies of shared writable data. In delayed consistency protocols the effect of out-going and in-...
MICRO
2007
IEEE
14 years 3 months ago
2007
IEEE
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
SPAA
2010
ACM
14 years 1 months ago
2010
ACM
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...
ARCS
2006
Springer
14 years 13 days ago
2006
Springer
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...