356 search results - page 69 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
KDD
2008
ACM
14 years 9 months ago
2008
ACM
Multi-core processors with ever increasing number of cores per chip are becoming prevalent in modern parallel computing. Our goal is to make use of the multi-core as well as multi...
MICRO
2006
IEEE
14 years 2 months ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
APN
1999
Springer
14 years 1 months ago
1999
Springer
Abstract. This paper presents parallel approaches to the complete transient numerical analysis of stochastic reward nets (SRNs) for both shared and distributed-memory machines. Par...
TVCG
1998
13 years 8 months ago
1998
—New challenges on vector field visualization emerge as time-dependent numerical simulations become ubiquitous in the field of computational fluid dynamics (CFD). To visualize da...