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109
Voted
ISCA
1997
IEEE
90views Hardware» more  ISCA 1997»
15 years 6 months ago
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abd...
119
Voted
VISUALIZATION
1997
IEEE
15 years 6 months ago
ROAMing terrain: real-time optimally adapting meshes
Terrain visualization is a difficult problem for applications requiring accurate images of large datasets at high frame rates, such as flight simulation and ground-based aircraf...
Mark A. Duchaineau, Murray Wolinsky, David E. Sige...
105
Voted
BIRTHDAY
1997
Springer
15 years 6 months ago
Spatial and Temporal Structures in Cognitive Processes
The structures of space and time are identified as essential for the realization of cognitive systems. It is suggested that the omnipresence of space and time may have been respons...
Christian Freksa
103
Voted
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
15 years 6 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi
147
Voted
RIDE
1996
IEEE
15 years 6 months ago
A Multidatabase System Implementation on CORBA
METU INteroperable DBMS (MIND) is a multidatabase system based on OMG's distributed object management architecture. It is implemented on top of a CORBA compliant ORB, namely,...
Asuman Dogac, Cevdet Dengi, Ebru Kilic, Gökha...
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