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» Modeling Memory for Melodies
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IISWC
2009
IEEE
15 years 11 months ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
CF
2009
ACM
15 years 11 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 10 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
ISCA
2010
IEEE
239views Hardware» more  ISCA 2010»
15 years 9 months ago
Sentry: light-weight auxiliary memory access control
Light-weight, flexible access control, which allows software to regulate reads and writes to any granularity of memory region, can help improve the reliability of today’s multi...
Arrvindh Shriraman, Sandhya Dwarkadas
HPCA
1999
IEEE
15 years 9 months ago
Limits to the Performance of Software Shared Memory: A Layered Approach
Much research has been done in fast communication on clusters and in protocols for supporting software shared memory across them. However, the end performance of applications that...
Angelos Bilas, Dongming Jiang, Yuanyuan Zhou, Jasw...