A model for virtual memory in a distributed memory parallel computer is proposed. It uses a novel parallel computing operating system framework and leads to the definition of two ...
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...