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MICRO
2000
IEEE
72views Hardware» more  MICRO 2000»
13 years 8 months ago
PipeRench implementation of the instruction path coprocessor
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John ...
VIS
2004
IEEE
93views Visualization» more  VIS 2004»
14 years 10 months ago
Investigating Swirl and Tumble Flow with a Comparison of Visualization Techniques
We investigate two important, common fluid flow patterns from computational fluid dynamics (CFD) simulations, namely, swirl and tumble motion typical of automotive engines. We stu...
Robert S. Laramee, Daniel Weiskopf, Jürgen Sc...
CHI
2009
ACM
14 years 9 months ago
Leveraging open-source software in the design and development process
This paper presents a case study of the NASA Ames Research Center HCI Group's design and development of a problem reporting system for NASA's next generation vehicle (to...
Collin Green, Irene Tollinger, Christian Ratterman...
ISORC
1998
IEEE
14 years 1 months ago
The Time-Triggered Architecture
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
Hermann Kopetz
DSN
2004
IEEE
14 years 16 days ago
Dynamic Quarantine of Internet Worms
If we limit the contact rate of worm traffic, can we alleviate and ultimately contain Internet worms? This paper sets out to answer this question. Specifically, we are interested ...
Cynthia Wong, Chenxi Wang, Dawn Xiaodong Song, Sta...