Sciweavers

14244 search results - page 2816 / 2849
» Modeling Program Predictability
Sort
View
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
14 years 2 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 2 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
14 years 2 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
COMPGEOM
2003
ACM
14 years 2 months ago
The smallest enclosing ball of balls: combinatorial structure and algorithms
We develop algorithms for computing the smallest enclosing ball of a set of n balls in d-dimensional space. Unlike previous methods, we explicitly address small cases (n ≤ d + 1...
Kaspar Fischer, Bernd Gärtner
SC
2003
ACM
14 years 2 months ago
Fast Parallel Non-Contiguous File Access
Many applications of parallel I/O perform non-contiguous file accesses: instead of accessing a single (large) block of data in a file, a number of (smaller) blocks of data scatt...
Joachim Worringen, Jesper Larsson Träff, Hube...
« Prev « First page 2816 / 2849 Last » Next »