78 search results - page 9 / 16 » Modeling QCA for area minimization in logic synthesis |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
In the paper, we propose a new metric for the minimization of area in the generic problem of multiple constant multiplications, and demonstrate its effectiveness for digital FIR f...
ISVLSI
2002
IEEE
14 years 23 days ago
2002
IEEE
Timed Shannon circuits have been proposed as a synthesis approach for a low power optimization technique at the logic level since overall circuit switching probabilities may be re...
ARGMAS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Several recent works in the area of Artificial Intelligence focus on computational models of argumentation-based negotiation. However, even if computational models of ar...
AC
2003
Springer
14 years 1 months ago
2003
Springer
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...