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DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 2 months ago
The Modelling of Embedded Systems Using HASoC
We present a design method (HASoC) for the lifecycle modelling of embedded systems that are targeted primarily, but not necessarily, at SoC implementations. The object-oriented de...
M. D. Edwards, P. N. Green
CODES
2004
IEEE
14 years 29 days ago
A novel deadlock avoidance algorithm and its hardware implementation
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
Jaehwan Lee, Vincent John Mooney III
IISWC
2008
IEEE
14 years 3 months ago
Evaluating the impact of dynamic binary translation systems on hardware cache performance
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
Arkaitz Ruiz-Alvarez, Kim M. Hazelwood
VLSID
2005
IEEE
129views VLSI» more  VLSID 2005»
14 years 9 months ago
A RISC Hardware Platform for Low Power Java
Java is increasingly being used as a language and binary format for low power, embedded systems. Current software only approaches to Java execution do not always suit the type of ...
Paul Capewell, Ian Watson
ECBS
2006
IEEE
153views Hardware» more  ECBS 2006»
14 years 27 days ago
A Unified Approach for Verification and Validation of Systems and Software Engineering Models
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
Luay Alawneh, Mourad Debbabi, Yosr Jarraya, Andrei...