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FATES
2005
Springer
14 years 2 months ago
Simulated Time for Testing Railway Interlockings with TTCN-3
Abstract. Railway control systems are timed and safety-critical. Testing these systems is a key issue. Prior to system testing, the software of a railway control system is tested s...
Stefan Blom, Natalia Ioustinova, Jaco van de Pol, ...
GI
2007
Springer
14 years 3 months ago
A Discrete Event Simulation Framework for Agent-Based Modelling of Logistic Systems
: Agent-based simulation can be viewed as methodical advancement and generalization of microscopic modelling styles in object-oriented and discrete event simulation well suited for...
Bernd Page, Nicolas Knaak, A. Kruse
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
14 years 2 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
WSC
1998
13 years 10 months ago
Informational Macrodynamics: System Modelling and Simulation Methodologies
Informational Macrodynamics (IMD) presents a unified informational systemic approach with common information language for modeling, analysis and optimization of a variety of inter...
Vladimir S. Lerner
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
14 years 6 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong