588 search results - page 24 / 118 » Modeling and Verifying Circuits Using Generalized Relative T... |
POPL
2010
ACM
14 years 5 months ago
2010
ACM
The method of logical relations is a classic technique for proving the equivalence of higher-order programs that implement the same observable behavior but employ different intern...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
FPGA
2005
ACM
14 years 1 months ago
2005
ACM
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
CAV
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Regular model checking is a form of symbolic model checking technique for systems whose states can be represented as finite words over a finite alphabet, where regular ...
ANSS
2000
IEEE
14 years 12 days ago
2000
IEEE
Computer simulation of switching power converters is complicated by the discontinuous (switching) nature of the converter waveforms. When switching details of the waveforms are of...