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DAC
2005
ACM
14 years 9 months ago
Device and architecture co-optimization for FPGA power reduction
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
CORR
2008
Springer
103views Education» more  CORR 2008»
13 years 8 months ago
The Capacity Region of the Degraded Finite-State Broadcast Channel
We consider the discrete, time-varying broadcast channel with memory, under the assumption that the channel states belong to a set of nite cardinality. We begin with the de nition...
Ron Dabora, Andrea J. Goldsmith
CORR
2011
Springer
213views Education» more  CORR 2011»
13 years 3 months ago
Adapting to Non-stationarity with Growing Expert Ensembles
Forecasting sequences by expert ensembles generally assumes stationary or near-stationary processes; however, in complex systems and many real-world applications, we are frequentl...
Cosma Rohilla Shalizi, Abigail Z. Jacobs, Aaron Cl...
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
14 years 2 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
ICLP
2005
Springer
14 years 1 months ago
Modeling Systems in CLP
We present a methodology for the modeling of complex program behavior in CLP. In the first part we present an informal description about how to represent a system in CLP. At its ...
Joxan Jaffar, Andrew E. Santosa, Razvan Voicu