Sciweavers

1617 search results - page 22 / 324
» Modeling and evaluation of hardware software designs
Sort
View
CODES
2009
IEEE
14 years 3 months ago
On compile-time evaluation of process partitioning transformations for Kahn process networks
Kahn Process Networks is an appealing model of computation for programming and mapping applications onto multi-processor platforms. Autonomous processes communicate through unboun...
Sjoerd Meijer, Hristo Nikolov, Todor Stefanov
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
14 years 2 months ago
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
KBSE
2010
IEEE
13 years 6 months ago
A program differencing algorithm for verilog HDL
During code review tasks, comparing two versions of a hardware design description using existing program differencing tools such as diff is inherently limited because existing p...
Adam Duley, Chris Spandikow, Miryung Kim
ISI
2005
Springer
14 years 1 months ago
Performance Study of a Compiler/Hardware Approach to Embedded Systems Security
Abstract. Trusted software execution, prevention of code and data tampering, authentication, and providing a secure environment for software are some of the most important security...
Kripashankar Mohan, Bhagirath Narahari, Rahul Simh...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 1 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...