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» Modeling and evaluation of hardware software designs
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HPCA
2007
IEEE
14 years 8 months ago
HARD: Hardware-Assisted Lockset-based Race Detection
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou
MTV
2006
IEEE
138views Hardware» more  MTV 2006»
14 years 2 months ago
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs
In this paper we will present an optimized structural 01X-SAT-solver for bounded model checking of blackbox designs that exploits semantical knowledge regarding the node selection...
Marc Herbstritt, Bernd Becker, Christoph Scholl
ICC
2007
IEEE
121views Communications» more  ICC 2007»
14 years 2 months ago
A Real-Time Hardware-Based Scheduler For Next-Generation Optical Burst Switches
– Optical burst switching (OBS) is a promising technique for next-generation optical switching networks. In traditional OBS, an entire burst is discarded when all output waveleng...
Muhammad T. Anan, Ghulam Chaudhry
DSN
2005
IEEE
14 years 2 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
DATE
2009
IEEE
130views Hardware» more  DATE 2009»
14 years 3 months ago
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
—IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Reesearchers have proposed visualizing and abstracting IP-XACT objects ...
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo ...