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WSC
1997
13 years 9 months ago
A Hybrid Tool for the Performance Evaluation of NUMA Architectures
We present a system for describing and solving closed queuing network models of the memory access performance of NUMA architectures. The system consists of a model description lan...
James Westall, Robert Geist
PDP
2011
IEEE
12 years 12 months ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...
COR
2008
131views more  COR 2008»
13 years 6 months ago
Queueing analysis of a server node in transaction processing middleware systems
Quantitative performance modeling of complex information systems is of immense importance for designing enterprise e-business infrastructures and applications. In this paper, we p...
Wei Xiong, Tayfur Altiok
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 2 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 2 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil