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DATE
2002
IEEE
99views Hardware» more  DATE 2002»
14 years 3 months ago
Gate Level Fault Diagnosis in Scan-Based BIST
A gate level, automated fault diagnosis scheme is proposed for scan-based BIST designs. The proposed scheme utilizes both fault capturing scan chain information and failing test v...
Ismet Bayraktaroglu, Alex Orailoglu
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 7 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
WSC
1997
13 years 11 months ago
A Framework for Performance Analysis of Parallel Discrete Event Simulators
A framework for performance analysis of parallel discrete event simulators is presented. The centerpiece of this framework is a platform-independent Workload Specification Langua...
Vijay Balakrishnan, Peter Frey, Nael B. Abu-Ghazal...
CLEIEJ
2007
203views more  CLEIEJ 2007»
13 years 10 months ago
Optimization Criteria for Effort Estimation using Fuzzy Technique
Effective cost estimation is the most challenging activity in software development. Software cost estimation is not an exact science. Cost estimation process involves a series of ...
Harish Mittal, Pradeep Bhatia
AGS
2009
Springer
14 years 4 months ago
Intelligent Agent Modeling as Serious Game
We propose a novel approach to intelligent tutoring gaming simulations designed for both educational and inquiry purposes in complex multi-actor systems such as infrastructures or...
D. W. F. van Krevelen