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TACAS
2010
Springer
14 years 3 months ago
2010
Springer
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
As an extension of Bayesian network, module network is an appropriate model for inferring causal network of a mass of variables from insufficient evidences. However learning such ...
ICDE
1996
IEEE
14 years 10 months ago
1996
IEEE
Three pointer-based parallel join algorithms are presented and analyzed for environments in which secondary storage is made transparent to the programmer through memory mapping. B...
DATE
2004
IEEE
14 years 12 days ago
2004
IEEE
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...