222 search results - page 12 / 45 » Modeling transactional memory workload performance |
ISLPED
2004
ACM
14 years 27 days ago
2004
ACM
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper quantifies the effect of architectural design decisions on the performance of TxLinux. TxLinux is a Linux kernel modified to use transactions in place of locking prim...
QEST
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper characterizes the workload seen at the storage subsystem of an e-commerce system. Measurements are conducted on multi-tiered systems running three different benchmarks,...
APCSAC
2007
IEEE
14 years 1 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...