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» Modeling transactional memory workload performance
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PPOPP
2006
ACM
14 years 1 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ISLPED
2010
ACM
158views Hardware» more  ISLPED 2010»
13 years 5 months ago
STM versus lock-based systems: an energy consumption perspective
The shift towards multicore processors and the well-known drawbacks imposed by lock-based synchronization have forced researchers to devise new alternatives for building concurren...
Felipe Klein, Alexandro Baldassin, Joao Moreira, P...
WDAG
2005
Springer
103views Algorithms» more  WDAG 2005»
14 years 28 days ago
Adaptive Software Transactional Memory
Software Transactional Memory (STM) is a generic synchronization construct that enables automatic conversion of correct sequential objects into correct nonblocking concurrent obje...
Virendra J. Marathe, William N. Scherer III, Micha...
ISPASS
2007
IEEE
14 years 1 months ago
Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events
This paper proposes the use of microprocessor performance counters for online measurement of complete system power consumption. While past studies have demonstrated the use of per...
W. Lloyd Bircher, Lizy K. John
ISCA
1998
IEEE
129views Hardware» more  ISCA 1998»
13 years 11 months ago
Memory System Characterization of Commercial Workloads
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
Luiz André Barroso, Kourosh Gharachorloo, E...