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» Modeling wire delay, area, power, and performance in a simul...
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JETC
2008
127views more  JETC 2008»
13 years 9 months ago
Automated module assignment in stacked-Vdd designs for high-efficiency power delivery
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
Yong Zhan, Sachin S. Sapatnekar
HOTI
2011
IEEE
12 years 10 months ago
iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture
Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power cons...
Dominic DiTomaso, Avinash Kodi, Savas Kaya, David ...
TVLSI
2010
13 years 5 months ago
Asynchronous Current Mode Serial Communication
Abstract--An asynchronous high-speed wave-pipelined bit-serial link for on-chip communication is presented as an alternative to standard bit-parallel links. The link employs the di...
Rostislav (Reuven) Dobkin, Michael Moyal, Avinoam ...
JCP
2008
105views more  JCP 2008»
13 years 10 months ago
Thermal Driven Placement for Island-style MTCMOS FPGAs
Rapid increase in transistor density and operating frequency has led to the increase in power densities, exhibiting itself as a high temperature profile. The high temperature spots...
Javid Jaffari, Mohab Anis
MOBISYS
2008
ACM
14 years 10 months ago
Micro power management of active 802.11 interfaces
Wireless interfaces are major power consumers on mobile systems. Considerable research has improved the energy efficiency of elongated idle periods or created more elongated idle ...
Jiayang Liu, Lin Zhong