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» Modelling Digital Circuits Problems with Set Constraints
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EUROCAST
2009
Springer
116views Hardware» more  EUROCAST 2009»
13 years 11 months ago
Complete Sets of Hamiltonian Circuits for Classification of Documents
The calculation of Hamiltonian Circuits is an NP-complete task. This paper uses slightly modified complete sets of Hamiltonian circuits for the classification of documents. The sol...
Bernd Steinbach, Christian Posthoff
ASPDAC
2006
ACM
98views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Timing-driven placement based on monotone cell ordering constraints
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...
Chanseok Hwang, Massoud Pedram
ISLPED
1995
ACM
193views Hardware» more  ISLPED 1995»
13 years 11 months ago
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint
We consider the problem of transistor sizing in a static CMOS layout to minimizethe power consumption of the circuit subject to a given delay constraint. Based on our characteriza...
Manjit Borah, Robert Michael Owens, Mary Jane Irwi...
FCT
2005
Springer
14 years 1 months ago
The Complexity of Semilinear Problems in Succinct Representation
We prove completeness results for twenty-three problems in semilinear geometry. These results involve semilinear sets given by additive circuits as input data. If arbitrary real co...
Peter Bürgisser, Felipe Cucker, Paulin Jacob&...
ICCAD
1998
IEEE
105views Hardware» more  ICCAD 1998»
13 years 12 months ago
Fanout optimization under a submicron transistor-level delay model
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
Pasquale Cocchini, Massoud Pedram, Gianluca Piccin...