2779 search results - page 46 / 556 » Modelling Immunological Memory |
EUROPAR
2010
Springer
13 years 11 months ago
2010
Springer
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
CODES
2006
IEEE
14 years 4 months ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
WSC
1997
13 years 11 months ago
1997
The speed of optical transmission links is growing at a rate which is difficult for the micro-electronic technology of ATM switches to follow. In order to cover the transmission r...
IAT
2008
IEEE
14 years 4 months ago
2008
IEEE
This paper presents an architecture for a memory model that facilitates versatile reasoning mechanisms over the beliefs stored in an agent’s belief base. Based on an approach fo...
ISCA
2010
IEEE
14 years 4 days ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...