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ECBS
2006
IEEE
153views Hardware» more  ECBS 2006»
13 years 11 months ago
A Unified Approach for Verification and Validation of Systems and Software Engineering Models
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
Luay Alawneh, Mourad Debbabi, Yosr Jarraya, Andrei...
DRR
2010
13 years 10 months ago
Efficient automatic OCR word validation using word partial format derivation and language model
In this paper we present an OCR validation module, implemented for the System for Preservation of Electronic Resources (SPER) developed at the U.S. National Library of Medicine.1 ...
Siyuan Chen, Dharitri Misra, George R. Thoma
DATE
2007
IEEE
123views Hardware» more  DATE 2007»
14 years 1 months ago
Clock domain crossing fault model and coverage metric for validation of SoC design
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
Yi Feng 0002, Zheng Zhou, Dong Tong, Xu Cheng
MICCAI
2002
Springer
14 years 8 months ago
Validation of Tissue Modelization and Classification Techniques in T1-Weighted MR Brain Images
Abstract. We propose a deep study on tissue modelization and classification Techniques on T1-weighted MR images. Three approaches have been taken into account to perform this valid...
Meritxell Bach Cuadra, Bram Platel, Eduardo Solana...
SLIP
2005
ACM
14 years 1 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...