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» Models of Computation for Networks on Chip
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IPPS
2007
IEEE
14 years 3 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
EJC
2007
13 years 9 months ago
Deterministic random walks on the integers
Jim Propp’s P-machine, also known as the ‘rotor router model’ is a simple deterministic process that simulates a random walk on a graph. Instead of distributing chips to ran...
Joshua N. Cooper, Benjamin Doerr, Joel H. Spencer,...
CORR
1999
Springer
94views Education» more  CORR 1999»
13 years 8 months ago
Performance of data networks with random links
We investigate simplified models of computer data networks and examine how the
Henryk Fuks, Anna T. Lawniczak
WIOPT
2010
IEEE
13 years 7 months ago
Stochastic modeling of carrier sensing based cognitive radio networks
In this paper, we propose a comprehensive probabilistic framework which can be used to model and analyze cognitive radio (CR) network using carrier sensing (CS) based multiple acc...
Nguyen Tien Viet, François Baccelli
ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
14 years 6 months ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda