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» Models of Computation for Networks on Chip
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ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
14 years 1 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 6 months ago
Fast and robust quadratic placement combined with an exact linear net model
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...
Peter Spindler, Frank M. Johannes
TC
2008
13 years 9 months ago
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron...
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 11 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
GCC
2007
Springer
14 years 3 months ago
Quality of Service of Grid Computing: Resource Sharing
Rapid advancement of communication technology has changed the landscape of computing. New models of computing, such as business-on-demand, Web services, peer-to-peer networks, and...
Xian-He Sun, Ming Wu