Sciweavers

6229 search results - page 48 / 1246
» Models of Computation for Networks on Chip
Sort
View
IEEEPACT
2009
IEEE
13 years 6 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
SODA
2008
ACM
105views Algorithms» more  SODA 2008»
13 years 10 months ago
Deterministic random walks on regular trees
Jim Propp's rotor router model is a deterministic analogue of a random walk on a graph. Instead of distributing chips randomly, each vertex serves its neighbors in a fixed or...
Joshua N. Cooper, Benjamin Doerr, Tobias Friedrich...
LCTRTS
2005
Springer
14 years 2 months ago
Nonintrusive precision instrumentation of microcontroller software
Debugging, testing, and profiling microcontroller programs are notoriously difficult. The lack of supporting software such as an operating system, a narrow interface to the hard...
Ben Titzer, Jens Palsberg
CCE
2005
13 years 8 months ago
Large-scale inference of the transcriptional regulation of Bacillus subtilis
This paper addresses the inference of the transcriptional regulatory network of Bacillus subtilis. Two inference approaches, a linear, additive model and a non-linear power-law mo...
Anshuman Gupta, Jeffrey D. Varner, Costas D. Maran...
TVLSI
2008
139views more  TVLSI 2008»
13 years 8 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood