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IEEEPACT
2002
IEEE
14 years 2 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
SPAA
2010
ACM
14 years 1 months ago
TLRW: return of the read-write lock
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible readers. In fact, no modern STM design locks to read along its common execution path b...
David Dice, Nir Shavit
CF
2009
ACM
14 years 1 months ago
Non-clairvoyant speed scaling for batched parallel jobs on multiprocessors
Energy consumption and heat dissipation have become key considerations for modern high performance computer systems. In this paper, we focus on non-clairvoyant speed scaling to mi...
Hongyang Sun, Yangjie Cao, Wen-Jing Hsu
ICS
2009
Tsinghua U.
14 years 1 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
HCW
2000
IEEE
14 years 1 months ago
Combining Workstations and Supercomputers to Support Grid Applications: The Parallel Tomography Experience
Computational Grids are becoming an increasingly important and powerful platform for the execution of largescale, resource-intensive applications. However, it remains a challenge ...
Shava Smallen, Walfredo Cirne, Jaime Frey, Francin...