Sciweavers

6106 search results - page 1042 / 1222
» Modes for Software Architectures
Sort
View
166
Voted
CODES
2009
IEEE
15 years 10 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
155
Voted
IPPS
2009
IEEE
15 years 10 months ago
Portable builds of HPC applications on diverse target platforms
—High-end machines at modern HPC centers are constantly undergoing hardware and system software upgrades – necessitating frequent rebuilds of application codes. The number of p...
Magdalena Slawiñska, Jaroslaw Slawinski, Va...
148
Voted
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
15 years 10 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
154
Voted
EMSOFT
2009
Springer
15 years 10 months ago
Handling mixed-criticality in SoC-based real-time embedded systems
System-on-Chip (SoC) is a promising paradigm to implement safety-critical embedded systems, but it poses significant challenges from a design and verification point of view. In ...
Rodolfo Pellizzoni, Patrick O'Neil Meredith, Min-Y...
134
Voted
OTM
2009
Springer
15 years 10 months ago
TMBean: Optimistic Concurrency in Application Servers Using Transactional Memory
Abstract. In this experience report, we present an evaluation of different techniques to manage concurrency in the context of application servers. Traditionally, using entity beans...
Lucas Charles, Pascal Felber, Christophe Gêt...
« Prev « First page 1042 / 1222 Last » Next »