6106 search results - page 258 / 1222 » Modes for Software Architectures |
IEEEPACT
2007
IEEE
14 years 4 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
ECSA
2010
Springer
13 years 10 months ago
2010
Springer
Architectural level analysis of a software system for its quality attributes is a proven cost-effective approach. This is particularly significant for performance, which defines m...
DAC
2011
ACM
12 years 9 months ago
2011
ACM
Modern processor architectures call for software that is highly tuned to an unpredictable operating environment. Processlevel virtualization systems allow existing software to ada...
ICCV
2009
IEEE
15 years 2 months ago
2009
IEEE
In many recent object recognition systems, feature extraction
stages are generally composed of a filter bank, a
non-linear transformation, and some sort of feature pooling
layer...
GLOBECOM
2009
IEEE
14 years 4 months ago
2009
IEEE
—We consider a Delay Tolerant Network (DTN) whose users (nodes) are connected by an underlying Mobile Ad hoc Network (MANET) substrate. Users can declaratively express high-level...