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    FSTTCS
    2000
    Springer
    63views Software Engineering» more  FSTTCS 2000»
    Using Modes to Ensure Subject Reduction for Typed Logic Programs with Subtyping
    13 years 11 months ago
    Using Modes to Ensure Subject Reduction for Typed Logic Programs with Subtyping
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    Jan-Georg Smaus, François Fages, Pierre Der...
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    CCE
    2010
    121views Software Engineering» more  CCE 2010»
    A robust clustering method for detection of abnormal situations in a process with multiple steady-state operation modes
    13 years 4 months ago
    A robust clustering method for detection of abnormal situations in a process with multiple steady-state operation modes
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    Mauricio Maestri, Andrés Farall, Pablo Groi...
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    EMSOFT
    2006
    Springer
    94views Software Engineering» more  EMSOFT 2006»
    Compiler-assisted leakage energy optimization for clustered VLIW architectures
    13 years 11 months ago
    Compiler-assisted leakage energy optimization for clustered VLIW architectures
    Download  www.cecs.uci.edu
    Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
    Rahul Nagpal, Y. N. Srikant
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    INTEGRATION
    2007
    100views more  INTEGRATION 2007»
    A fast pipelined multi-mode DES architecture operating in IP representation
    13 years 7 months ago
    A fast pipelined multi-mode DES architecture operating in IP representation
    Download  www.tsi.enst.fr
    The Data Encryption Standard (DES) is a cipher that is still used in a broad range of applications, from smartcards, where it is often implemented as a tamperresistant embedded co...
    Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...
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    DAC
    1997
    ACM
    148views Computer Architecture» more  DAC 1997»
    COSYN: Hardware-Software Co-Synthesis of Embedded Systems
    13 years 11 months ago
    COSYN: Hardware-Software Co-Synthesis of Embedded Systems
    Download  www.cecs.uci.edu
    : Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
    Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
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