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134
Voted
DAC
1994
ACM
15 years 7 months ago
1994
ACM
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
132
Voted
IESS
2007
Springer
15 years 9 months ago
2007
Springer
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
149
Voted
TCS
2002
15 years 3 months ago
2002
This paper explores the application of rewriting logic to the executable formal modeling of real-time and hybrid systems. We give general techniques by which such systems can be s...
157
Voted
ENTCS
2007
15 years 3 months ago
2007
Bounded Model Checking (BMC) is a successful refutation method to detect errors in not only circuits and other binary systems but also in systems with more complex domains like ti...
135
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RTCSA
2009
IEEE
15 years 10 months ago
2009
IEEE
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...