575 search results - page 110 / 115 » Multi-Valued Logic Synthesis |
TCAD
2008
13 years 9 months ago
2008
Detecting symmetries has many applications in logic synthesis that include, amongst other things, technology mapping, deciding equivalence of Boolean functions when the input corre...
TCAD
2002
13 years 9 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
ASPDAC
2010
ACM
13 years 7 months ago
2010
ACM
Abstract-- Optimizing blocks in a System-on-Chip (SoC) circuit is becoming more and more important nowadays due to the use of third-party Intellectual Properties (IPs) and reused d...
FPGA
2007
ACM
14 years 4 months ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
ATS
1998
IEEE
14 years 2 months ago
1998
IEEE
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...