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ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
14 years 3 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
14 years 2 months ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
14 years 6 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
14 years 4 months ago
A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy
We define a robust fault model as a model where the existence of an undetectable fault implies the existence of logic redundancy, or more generally, a suboptimality in the synthe...
Irith Pomeranz, Sudhakar M. Reddy
JELIA
2004
Springer
14 years 3 months ago
Towards a Logical Analysis of Biochemical Pathways
Biochemical pathways or networks are generic representations used to model many different types of complex functional and physical interactions in biological systems. Models based ...
Patrick Doherty, Steve Kertes, Martin Magnusson, A...