575 search results - page 96 / 115 » Multi-Valued Logic Synthesis |
DAC
2006
ACM
14 years 10 months ago
2006
ACM
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
POPL
2004
ACM
14 years 10 months ago
2004
ACM
In prior work we introduced a pure type assignment system that encompasses a rich set of property types, including intersections, unions, and universally and existentially quantif...
DDECS
2008
IEEE
14 years 4 months ago
2008
IEEE
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...
FPGA
2007
ACM
14 years 4 months ago
2007
ACM
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
CHES
2005
Springer
14 years 3 months ago
2005
Springer
Abstract. It has recently been shown that logic circuits in the implementation of cryptographic algorithms, although protected by “secure” random masking schemes, leak side-cha...