Sciweavers

575 search results - page 99 / 115
» Multi-Valued Logic Synthesis
Sort
View
ICCAD
2005
IEEE
87views Hardware» more  ICCAD 2005»
14 years 6 months ago
Statistical technology mapping for parametric yield
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
Ashish Kumar Singh, Murari Mani, Michael Orshansky
EON
2008
13 years 11 months ago
Synthesizing the Mediator with jABC/ABC
Abstract. In this paper we show how to apply a tableau-based software composition technique to automatically generate the mediator's service logic. This uses an LTL planning (...
Tiziana Margaria
TCAD
2008
93views more  TCAD 2008»
13 years 9 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
LOPSTR
1997
Springer
14 years 2 months ago
Development of Correct Transformation Schemata for Prolog Programs
Schema-based program transformation [8] has been proposed as an effective technique for the optimisation of logic programs. Schemata are applied to a logic program, mapping ineffi...
Julian Richardson, Norbert E. Fuchs
CASES
2005
ACM
13 years 11 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...