3 search results - page 1 / 1 » Multi-domain clock skew scheduling-aware register placement ... |
DATE
2009
IEEE
14 years 5 months ago
2009
IEEE
Multi-domain clock skew scheduling is a cost effective technique for performance improvement. However, the required wire length and area overhead due to phase shifters for realizin...
ASPDAC
2005
ACM
14 years 4 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...