Sciweavers

3 search results - page 1 / 1
» Multi-objective circuit partitioning for cutsize and path-ba...
Sort
View
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
14 years 7 months ago
Multi-objective circuit partitioning for cutsize and path-based delay minimization
– In this paper we present multi-objective hMetis partitioning for simultaneous cutsize and circuit delay minimization. We change the partitioning process itself by introducing a...
Cristinel Ababei, Navaratnasothie Selvakkumaran, K...
ISPD
2003
ACM
89views Hardware» more  ISPD 2003»
14 years 4 months ago
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Traditional multilevel partitioning approaches have shown good performance with respect to cutsize, but offer no guarantees with respect to system performance. Timing-driven part...
Andrew B. Kahng, Xu Xu
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 5 months ago
Multiple-Width Bus Partitioning Approach to Datapath Synthesis
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
Arash Ahmadi, Mark Zwolinski