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ASYNC
1997
IEEE
103views Hardware» more  ASYNC 1997»
13 years 11 months ago
Efficient Timing Analysis Algorithms for Timed State Space Exploration
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
Wendy Belluomini, Chris J. Myers
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
14 years 1 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
GECCO
1999
Springer
116views Optimization» more  GECCO 1999»
13 years 12 months ago
Dynamic Degree Constrained Network Design: A Genetic Algorithm Approach
The design and development of network infrastructure to support mission-critical operations has become a critical and complicated issue. In this study we explore the use of geneti...
Chao-Hsien Chu, G. Premkumar, Carey Chou, Jianzhon...
ICML
2003
IEEE
14 years 28 days ago
Evolutionary MCMC Sampling and Optimization in Discrete Spaces
The links between genetic algorithms and population-based Markov Chain Monte Carlo (MCMC) methods are explored. Genetic algorithms (GAs) are well-known for their capability to opt...
Malcolm J. A. Strens
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
14 years 2 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya