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ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 14 days ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 6 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
ESCIENCE
2006
IEEE
14 years 1 months ago
Characterization of Computational Grid Resources Using Low-Level Benchmarks
An important factor that needs to be taken into account by end-users and systems (schedulers, resource brokers, policy brokers) when mapping applications to the Grid, is the perfo...
George Tsouloupas, Marios D. Dikaiakos
CC
2006
Springer
124views System Software» more  CC 2006»
13 years 11 months ago
Polyhedral Code Generation in the Real World
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...
Nicolas Vasilache, Cédric Bastoul, Albert C...
PVLDB
2008
81views more  PVLDB 2008»
13 years 7 months ago
Optimization of multi-domain queries on the web
Where can I attend an interesting database workshop close to a sunny beach? Who are the strongest experts on service computing based upon their recent publication record and accep...
Daniele Braga, Stefano Ceri, Florian Daniel, David...