56 search results - page 7 / 12 » Multilevel generalized force-directed method for circuit pla... |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
In a placed circuit, there are a lot of movable cells that can be flipped to further reduce the total wirelength, without affecting the original placement solution. We aim at solv...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
ISPD
2003
ACM
14 years 27 days ago
2003
ACM
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitio...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...