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JPDC
2007
60views more  JPDC 2007»
13 years 7 months ago
The impact of wrong-path memory references in cache-coherent multiprocessor systems
The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction. Despite their relatively high branch...
Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustu...
DAC
2003
ACM
14 years 8 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
ANSS
2006
IEEE
14 years 1 months ago
Performance Enhancement by Eliminating Redundant Function Execution
Programs often call the same function with the same arguments, yielding the same results. We call this phenomenon, “function reuse”. Previously, we have shown such a behavior ...
Peng Chen, Krishna M. Kavi, Robert Akl
ICIP
1997
IEEE
14 years 9 months ago
An adaptive interpolation scheme for 2-D mesh motion compensation
Two dimensional mesh motion compensation produces blocking free prediction in contrast to block matching motion compensation by generating a smooth full motion field from the set ...
Pohsiang Hsu, K. J. Ray Liu, Tsuhan Chen
DAC
2000
ACM
14 years 8 months ago
Multiple Si layer ICs: motivation, performance analysis, and design implications
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, ...