377 search results - page 33 / 76 » Multiple Instruction Stream Processor |
CSREAESA
2006
13 years 9 months ago
2006
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
JMLR
2010
13 years 6 months ago
2010
A new algorithm for building decision tree classifiers is proposed. The algorithm is executed in a distributed environment and is especially designed for classifying large datase...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
DATE
1998
IEEE
13 years 12 months ago
1998
IEEE
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
FCCM
2005
IEEE
14 years 1 months ago
2005
IEEE
The solution to a set of sparse linear equations Ax = b, where A is an n×n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vect...