377 search results - page 37 / 76 » Multiple Instruction Stream Processor |
ASPLOS
1989
ACM
13 years 11 months ago
1989
ACM
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
DCC
2007
IEEE
14 years 7 months ago
2007
IEEE
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...
VLDB
2005
ACM
14 years 8 months ago
2005
ACM
Efficient querying of XML streams will be one of the fundamental features of next-generation information systems. In this paper we propose the TurboXPath path processor, which acce...
IPPS
1996
IEEE
13 years 12 months ago
1996
IEEE
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...