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    ACMMSP
    2004
    ACM
    125views Hardware» more  ACMMSP 2004»
    Improving trace cache hit rates using the sliding window fill mechanism and fill select table
    14 years 1 months ago
    Improving trace cache hit rates using the sliding window fill mechanism and fill select table
    Download  www.cs.rochester.edu
    As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
    Muhammad Shaaban, Edward Mulrane
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    WMPI
    2004
    ACM
    135views Computer Architecture» more  WMPI 2004»
    A localizing directory coherence protocol
    14 years 1 months ago
    A localizing directory coherence protocol
    Download  www.cs.utah.edu
    User-controllable coherence revives the idea of cooperation between software and hardware in an attempt to bridge the gap between efficient small-scale shared memory machines and m...
    Collin McCurdy, Charles N. Fischer
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    FPGA
    2004
    ACM
    119views FPGA» more  FPGA 2004»
    In-system FPGA prototyping of an itanium microarchitecture
    14 years 1 months ago
    In-system FPGA prototyping of an itanium microarchitecture
    Download  www.ece.cmu.edu
    We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
    Roland E. Wunderlich, James C. Hoe
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    PDPTA
    2003
    135views Distributed And Parallel Com...» more  PDPTA 2003»
    Comparing Multiported Cache Schemes
    13 years 9 months ago
    Comparing Multiported Cache Schemes
    Download  www.univ-valenciennes.fr
    The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
    Smaïl Niar, Lieven Eeckhout, Koenraad De Boss...
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    ISCAPDCS
    2004
    113views Distributed And Parallel Com...» more  ISCAPDCS 2004»
    An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs
    13 years 9 months ago
    An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs
    Download  liberty.princeton.edu
    Hyperthreaded(HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by ex...
    Yun Zhang, Mihai Burcea, Victor Cheng, Ron Ho, Mic...
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