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ICCD
2002
IEEE
137views Hardware» more  ICCD 2002»
14 years 6 months ago
Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction
Multiple supply voltages, multiple transistor thresholds and transistor sizing could be used to reduce the power dissipation of digital blocks. This paper presents a framework for...
Stephanie Augsburger, Borivoje Nikolic
PDCAT
2009
Springer
14 years 4 months ago
Balanced Dense Polynomial Multiplication on Multi-Cores
Abstract— In symbolic computation, polynomial multiplication is a fundamental operation akin to matrix multiplication in numerical computation. We present efficient implementati...
Marc Moreno Maza, Yuzhen Xie
FPL
2005
Springer
127views Hardware» more  FPL 2005»
14 years 3 months ago
Efficient Hardware Architectures for Modular Multiplication on FPGAs
The computational fundament of most public-key cryptosystems is the modular multiplication. Improving the efficiency of the modular multiplication is directly associated with the...
David Narh Amanor, Viktor Bunimov, Christof Paar, ...
IVS
2010
62views more  IVS 2010»
13 years 4 months ago
A survey of multiple tree visualisation
This article summarises the current state of research into multiple tree visualisations. It discusses the spectrum of current representation techniques used on single trees, pairs ...
Martin Graham, Jessie B. Kennedy
CAISE
2004
Springer
14 years 3 months ago
A Motivation for Multiple Activity Instantiation in BPEL4WS Processes
We suggest to extend BPEL4WS with structured activities for multiple instantiation since this is a crucial feature of a business process modelling language. In particular, we propo...
Jan Mendling, Mark Strembeck, Gustaf Neumann