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DATE
2000
IEEE
90views Hardware» more  DATE 2000»
15 years 10 months ago
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
Jörg Henkel, Tony Givargis, Frank Vahid
NOMS
2000
IEEE
141views Communications» more  NOMS 2000»
15 years 10 months ago
IconoNET: a tool for automated bandwidth allocation planning
Communication networks are expected to offer a wide range of services to an increasingly large number of users, with a diverse range of quality of service. This calls for efficien...
Christian Frei, Boi Faltings, George Melissargos, ...
CAV
2000
Springer
89views Hardware» more  CAV 2000»
15 years 10 months ago
Tuning SAT Checkers for Bounded Model Checking
Abstract. Bounded Model Checking based on SAT methods has recently been introduced as a complementary technique to BDD-based Symbolic Model Checking. The basic idea is to search fo...
Ofer Strichman
DARS
2000
Springer
128views Robotics» more  DARS 2000»
15 years 10 months ago
Motion Planning for a Modular Self-Reconfiguring Robotic System
In this paper, we address the issue of motion planning for a bipartite class of modular self-reconfiguring robotic system (I-Cubes) that is a collection of active elements providin...
Cem Ünsal, Han Kiliççöte, ...
EPS
1998
Springer
15 years 9 months ago
Evolutionary Algorithms for Vertex Cover
This paper reports work investigating various evolutionary approaches to vertex cover (VC), a well-known NP-Hard optimization problem. Central to each of the algorithms is a novel ...
Isaac K. Evans