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DAC
2002
ACM
14 years 8 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
HPDC
2009
IEEE
14 years 2 months ago
Exploring data reliability tradeoffs in replicated storage systems
This paper explores the feasibility of a cost-efficient storage architecture that offers the reliability and access performance characteristics of a high-end system. This architec...
Abdullah Gharaibeh, Matei Ripeanu
CF
2009
ACM
14 years 1 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
ICSE
2010
IEEE-ACM
14 years 4 days ago
Adaptive bug isolation
Statistical debugging uses lightweight instrumentation and statistical models to identify program behaviors that are strongly predictive of failure. However, most software is most...
Piramanayagam Arumuga Nainar, Ben Liblit
CODES
2009
IEEE
14 years 2 days ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...