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HIPC
2004
Springer
14 years 1 months ago
Parallel Performance of Hierarchical Multipole Algorithms for Inductance Extraction
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
Hemant Mahawar, Vivek Sarin, Ananth Grama
ICA3PP
2010
Springer
14 years 13 days ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
MMSEC
2006
ACM
220views Multimedia» more  MMSEC 2006»
14 years 1 months ago
Robust blind watermarking mechanism for motion data streams
The commercial reuse of 3D motion capture (Mocap) data in animation and life sciences raises issues with respect to its copyright. In order to improvise content protection of Moca...
Parag Agarwal, Ketaki Adi, B. Prabhakaran
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
14 years 2 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
RTAS
2009
IEEE
14 years 2 months ago
Power-Aware CPU Utilization Control for Distributed Real-Time Systems
CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable environmen...
Xiaorui Wang, Xing Fu, Xue Liu, Zonghua Gu